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Multi-Level Hardware Debug - Part 3 - SoC HW & HW/SW Debug

Mon 19 Oct 2026 12:00 PM - Tue 20 Oct 2026 4:00 PM BST Online

Multi-Level Hardware Debug - Part 3 - SoC HW & HW/SW Debug

Mon 19 Oct 2026 12:00 PM - Tue 20 Oct 2026 4:00 PM BST Online

Part 3 — SoC HW & HW/SW Debug

2-session Live Online Training

Master advanced System-on-Chip (SoC) debugging methodologies by learning how modern hardware and software are debugged together throughout silicon bring-up, system integration, and post-silicon validation. This practical training equips engineers with the knowledge and techniques required to diagnose complex SoC issues using industry-standard debug infrastructures, trace technologies, and hardware/software co-debug workflows.

Format: Live Online
Duration: 2 Consecutive sessions | 4 Hours per session
Pricing: $60

Register for Part 3

Whether you're responsible for silicon validation, SoC integration, hardware bring-up, or embedded software development, this course provides the practical methodologies that semiconductor engineering teams use to accelerate debugging, improve system validation, and reduce time-to-market.

Course Overview

Learn how modern System-on-Chip (SoC) platforms are debugged from initial silicon bring-up through hardware/software integration and full application-level analysis.

This intensive two-session training explores the complete SoC debug lifecycle, covering hardware-only debugging, post-silicon validation, trace technologies, peripheral debugging, hardware/software integration, and end-to-end debug workflows used throughout semiconductor development.

Participants will gain practical insight into how experienced silicon validation and bring-up engineers diagnose complex SoC issues using JTAG, trace infrastructure, hardware breakpoints, software debuggers, and industry-standard debug methodologies to accelerate successful silicon validation and product deployment.

What You Will Learn

By the end of this training, you will:

  • Understand the architecture and infrastructure behind modern SoC debugging

  • Learn how to perform hardware-only debug during silicon bring-up and validation

  • Explore JTAG, Debug Access Ports (DAPs), trace technologies, and on-chip debug infrastructure

  • Apply structured hardware/software debugging methodologies across complete SoC platforms

  • Debug memory maps, peripheral interfaces, interrupts, and exception handling

  • Understand multi-core SoC debugging techniques and hardware/software interaction

  • Learn practical workflows for Bare-Metal, RTOS, and Linux application debugging

  • Build an end-to-end debug strategy from hardware bring-up through software validation

  • Develop practical skills using professional tools and real-world debugging scenarios

Topics Covered

Session 1 — SoC Hardware Debug & Hardware/Software Integration

  • SoC debug architecture and on-chip debug infrastructure

  • JTAG fundamentals and Debug Access Ports (DAPs)

  • Hardware bring-up and post-silicon validation workflows

  • Trace architecture and debug visibility

  • Clock, reset, and power-domain debugging

  • Hardware/software debug foundations

  • Memory map and address decode debugging

  • Peripheral register analysis

  • Hardware and software breakpoint methodologies

  • Practical SoC bring-up and hardware debugging demonstrations

Session 2 — SoC Program Debug & End-to-End Debug Workflows

  • Single-core program debugging

  • Register, memory, and call-stack inspection

  • Interrupt and exception debugging

  • Multi-core SoC debugging methodologies

  • Shared-memory debugging and synchronisation analysis

  • Bare-Metal, RTOS, and Linux application debugging

  • Hardware/software co-debug strategies

  • End-to-end debug workflow from RTL to running software

  • Debugging complex SoC integration issues

  • Complete capstone demonstrating modern SoC debugging methodologies

Who Should Attend

This course is ideal for:

  • SoC Verification Engineers

  • Silicon Validation Engineers

  • Hardware Bring-Up Engineers

  • ASIC Design Engineers

  • Embedded Software Engineers

  • Firmware Engineers

  • CPU & SoC Architects

  • FPGA Engineers working with embedded systems

  • Technical Leads responsible for silicon validation and platform integration

  • Engineers involved in hardware/software co-development

Training Format

  • Live online instructor-led sessions

  • Two consecutive training sessions

  • Four hours of interactive instruction per session

  • Real-world SoC bring-up demonstrations

  • Hardware/software debugging case studies

  • Practical debugging workflows using commercial and open-source tools

  • Interactive technical discussions and Q&A

  • Industry-focused examples based on modern semiconductor development

What's Included

  • Live instructor-led training

  • Comprehensive digital course materials

  • Practical SoC debugging demonstrations

  • Interactive Q&A sessions

  • Certificate of Completion

Key Benefits

✔ Learn professional methodologies for debugging complex System-on-Chip platforms

✔ Understand the complete silicon bring-up and post-silicon validation process

✔ Gain practical experience with JTAG, trace infrastructure, and hardware/software integration

✔ Develop efficient workflows for debugging processors, peripherals, memory systems, and application software

✔ Learn how hardware and software teams collaborate to resolve complex integration issues

✔ Build confidence debugging Bare-Metal, RTOS, Linux, and multi-core embedded systems

✔ Apply structured debugging techniques throughout the complete SoC development lifecycle

✔ Strengthen your expertise in modern SoC validation, integration, and hardware/software co-debug