Hands-on AI in Formal Verification Training (Edinburgh or online)

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This session will be recorded and will be available to all registrants 1 week post-session.

Format: Hybrid: In-person and online

Overview

Artificial Intelligence is transforming the way engineers approach Formal Verification (FV), from selecting the right verification applications and generating scripts to analysing formal results, debugging failures and integrating AI into existing verification workflows.

This hands-on training session provides a practical introduction to how AI can support key stages of the formal verification process, helping engineers explore opportunities to improve productivity while maintaining robust engineering oversight.

Participants will explore real-world formal verification scenarios through guided demonstrations, interactive quizzes, hands-on activities and practical user stories.

The session focuses on applying AI to everyday formal verification challenges, including script generation, requirement-to-SVA translation, state-space mitigation, abstraction, automated debugging and report analysis.

Designed for engineers working with formal verification, this session combines practical learning with hands-on exercises to help attendees understand where AI can deliver value within their existing workflows.

Who Should Attend

• • Formal Verification engineers looking to apply AI to their workflows

  • Design Verification engineers working with assertions and formal methods

  • RTL designers interested in AI-assisted formal verification

  • Verification leads evaluating AI adoption in formal flows

  • Engineers seeking to improve formal analysis, debugging and productivity

Prerequisites

Participants should have:

• Basic SystemVerilog and SVA knowledge

• Familiarity with assertions, assumptions and cover properties

• An understanding of clock and reset setup

• Experience interpreting formal proof results

Learning Objectives

By the end of the session, you will be able to:

• Select a suitable formal verification application for a given design and verification objective.

• Review AI-generated TCL scripts, configuration files and SVA against design intent.

• Translate SVA into traceable requirements and assess timing and reset behaviour.

• Evaluate AI-proposed constraints, cut points and block abstractions.

• Use AI-assisted approaches to investigate counterexamples and formal verification findings.

• Identify opportunities for AI assistance across the formal verification workflow.

• Understand where human review and engineering judgement remain essential.

Agenda Highlights

AI-Assisted Formal Application Selection

• Using AI to identify suitable formal verification applications

• Exploring FV App Advisor and reviewing application recommendations

• Assessing AI-generated recommendations against design requirements

AI-Assisted Script Generation

• Generating TCL and configuration files for formal tools

• Reviewing top modules, file lists, clock and reset configurations

• Identifying potential errors and unresolved assumptions

Requirement ↔ SVA Translation

• Translating between formal properties and verification requirements

• Reviewing traceability between requirements and SVA

• Checking property timing and reset behaviour

Hands-on Activities

Throughout the session, participants will work through guided activities and user stories covering:

• Formal application selection using a supplied design profile

• AI-assisted generation and review of formal setup scripts

• SVA-to-requirement translation and traceability checks

• Evaluation of AI-proposed constraints

• Assessment of candidate cut points

• Block abstraction and black-boxing decisions

• AI-assisted counterexample analysis

• Triage of formal verification reports

• Mapping AI assistance points and human review responsibilities across a formal verification flow

Participants will work with prepared examples and guided exercises to explore how AI can support formal verification tasks while retaining appropriate engineering oversight.

Tools and Materials

The session will draw on:

• VC Formal and Cadence Jasper

• FV App Advisor

• Requirement ↔ SVA translation tools

• Large Language Model (LLM) access

• Prepared RTL, SVA, scripts and formal report excerpts

Attendee preparation: Participants should bring a laptop and ensure they can access the relevant tools and activity materials before the session.

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