AI in Physical Implementation | DV Club Edinburgh

About the Event

Artificial intelligence is rapidly moving deeper into the semiconductor development flow.

While much of the discussion around AI in chip development has focused on RTL design, verification and software, there is growing potential for AI to support and transform the physical implementation of semiconductor and FPGA designs.

This DV Club session will explore how AI is being applied at the lower levels of the design and implementation process, from FPGAs and timing analysis through to analogue and mixed-signal design, physical layout, chip implementation, thermal management and advanced packaging.

The session will bring together experts from across the semiconductor ecosystem to discuss practical applications, emerging approaches and the challenges of applying AI to increasingly complex physical design problems.

Topics may include

• AI-assisted FPGA implementation and optimisation

• Timing analysis, optimisation and closure

• AI for physical design and chip implementation

• Automated and intelligent layout

• AI in analogue and mixed-signal design

• Placement and routing optimisation

• Power, performance and area optimisation

• Thermal analysis and thermal-aware design

• Semiconductor packaging and advanced packaging

• AI-assisted design space exploration

• Predictive modelling and optimisation

• Integrating AI into existing physical design flows

• Challenges, limitations and opportunities for AI in physical implementation

Why Attend?

• Understand how AI is being applied beyond traditional RTL and verification

• Explore emerging AI techniques for physical implementation

• Learn how AI can help tackle increasingly complex design optimisation problems

• Hear practical insights from engineers and technology experts

• Discover opportunities to improve design productivity and efficiency

• Understand the challenges of applying AI to physical design workflows

• Connect with others working across semiconductor design and implementation

Who Should Attend?

This session is aimed at professionals and researchers working in:

• Physical Design

• FPGA Design

• ASIC and SoC Design

• Timing and Sign-off

• Analogue and Mixed-Signal Design

• Layout

• Power and Thermal Analysis

• Semiconductor Packaging

• EDA

• Design Automation

• AI for Semiconductor Design

• Semiconductor Research

Registration

Attendance is free, but registration is required.

Join us online to explore how AI is moving into the physical layers of semiconductor design and implementation, and what this could mean for the future of chip development.

Online joining details will be sent to registered attendees before the event.

👉 Also Register for Hands-on AI in Formal Verification Training (Edinburgh or online)

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