Formal Verification | Session 3: Formal Reuse, Advanced Formal and AI

Formal Verification | Session 3: Formal Reuse, Advanced Formal and AI

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This session explores how formal verification fits into a wider verification flow, how properties and constraints can be reused, and how formal methods can be applied to complex designs, SoC security and automation.

You will also explore datapath validation (DPV), formal register verification (FRV), and the use of AI tools in verification and formal workflows.

This session is part of a 3-session professional training programme:

• Session 1 — Formal Foundations, SVA and First Proofs

• Session 2 — Complex Proofs, Signoff and Block-Level Formal

• Session 3 — Formal Reuse, Advanced Formal and AI

REGISTRATION FOR ALL 3 SESSIONS IS 100$ ONLY.

What You Will Learn

• Reusing properties and constraints

• Integrating formal verification into the verification flow

• Evaluating design type and size suitability

• Advanced formal verification techniques

• SoC security proofs and automation

• Datapath validation (DPV)

• Formal register verification (FRV)

• AI applications in verification and formal methods

• Mapping SVA assertions to requirements

• Selecting appropriate formal Apps for verification tasks

Why This Matters

Formal verification can be applied to different design types and verification challenges, but selecting the right approach and reusing verification assets requires careful planning.

This session explores how formal Apps and AI tools can support security verification, functional safety, datapath validation, register verification and the mapping of assertions to requirements.

Ideal For

• RTL designers

• Design verification engineers

• Formal verification engineers

• Verification leads deciding where formal verification fits into their flow

• Engineers interested in formal security, functional safety and AI-assisted verification

Basic RTL and simulation knowledge is required. Familiarity with SystemVerilog is helpful, but no prior formal verification experience is needed.

Training Format

• 3-hour live online training session

• Concise teaching modules and live design examples

• APB4, RISC-V single-cycle, arbiter and traffic-light FSM examples

• Formal Security and Functional Safety App demonstrations

• Datapath Validation and Formal Register Verification App demonstrations

• SVA-to-Req Mapping and Formal Apps Advisor AI tool demonstrations

• Three-question quiz after every module

• Online submission exercises corresponding to the demonstrations

• Breaks for quiz review and submissions

• Overnight quiz

This session is Session 3 of the 3-session Formal Verification: Properties, Proofs and Signoff Programme.