DVClub Europe: Formal Verification

DVClub Europe: Formal Verification

Formal Verification can help you find bugs earlier in the design cycle and accelerate root cause analysis. But success with Formal requires the effective selection and implementation of the right formal technologies and methods. In this DVClub meeting our speakers will share their experiences adopting Formal Verification and then open the floor for discussion followed by the usual networking opportunities.

Agenda (BST)

12:00 Welcome and Introduction – Mike Bartley, Tessolve

12:00 Brajmohan Sharma, Marvell Technology - Advanced Formal Verification and Robust Regression Strategies for Highly Parameterized Designs

12:30 Easwaran Krishnan & Savita Suresh Lohar, Tessolve Semiconductor - Formal Verification

12:50 Alexandre Esselin Botelho, Cadence Design Systems - Effective Adoption of Formal Verification

13:10 Neena Chandawale, Agnisys Inc - Creating SVA for Formal Verification from Natural Language Specification: iSpec.ai

13:30 Close

Additional Information

For additional information please visit the Tessolve DVClub Europe webpage for this event.

Sponsors

DVClub Europe is made possible through the generous support of our sponsors: Agnisys, Cadence, Breker Verification System, Synopsys 

Tessolve reserves the right to cancel registration at its discretion.