On-Demand recordings access | Part 3: RISC-V SoC Verification | 3-Part RISC-V Verification Course

We offer 50% discount to students, please complete this form to avail discount.

This is a part of a 3-session series:

• Part 1 – Introduction to CPU and CPU Verification - 16-17 April and 20-21 April 2026, 8.30 to 12.00
• Part 2 – RISC-V CPU Verification - 4 - 8 May 2026, 8.30 to 12.00
• Part 3 – RISC-V SoC Verification - 27-29 May and 1 June 2026, 8.30 to 12.00

REGISTRATION FOR ALL 3 SESSIONS IS AT £499 ONLY.

Part 3 focuses on verifying a RISC-V CPU within a System-on-Chip (SoC). Participants will explore SoC verification strategies, learn about the architecture and environment of a training SoC, and gain hands-on experience running, updating, and creating self-checking tests. The course covers debugging, verification of specific SoC features such as reset, boot, clocks, power, interrupts, and system control, and sign-off procedures, including collecting coverage metrics and writing SoC verification reports. Practical exercises combined with classroom review sessions allow participants to apply learned techniques to real-world SoC verification scenarios, ensuring they can contribute effectively to SoC verification projects.

Agenda:

• Introduction to SoC verification strategies and challenges

• Overview of training SoC and verification environment

• Running, updating, and creating self-checking SoC tests

• Debugging and triaging SoC issues

• Verifying SoC features: reset, boot, clocks, power, interrupts, and system control

• Collecting coverage metrics and writing SoC sign-off reports

• Practical exercises and classroom review

Participants may also enrol in the Complete Program, which includes additional advanced modules, Moodle access, quizzes, exams, advanced verification strategies, and extra design examples.