AI Flows, Deployment & Execution | Part 3: AI in DV and VLSI

We offer 50% discount to students, please complete this form to avail discount.

This session will be recorded and will be available to all registrants 1 week post-session.

Consists of the three sessions:

• 14 July 2026 – AI Methods in VLSI & DV
• 15 July 2026 – Benefits, Limitations & Case Studies
• 16 July 2026 – AI Flows, Deployment & Execution

Register for all 3 sessions of the AI in DV and VLSI training series for only $49

Guest trainer:
Vikash Kumar | Senior Verification Architect, Arm & IEEE Senior Member

This focused three-part series explores how AI is transforming VLSI design and Design Verification (DV) — from code generation to autonomous verification workflows.

Participants will gain a clear understanding of how AI can be applied today, what works in production, and how to safely deploy AI within verification environments.

Session 3 – AI Flows, Deployment & Execution

• Open-source vs enterprise AI tools

• Deployment on verification environments

• Integration with VCS and Xcelium

• Live workflow:
  Spec → UVM → Simulation → Debug → Self-correction