Benefits, Limitations & Case Studies | Part 2: AI in DV and VLSI

This session will be recorded and will be available to all registrants 1 week post-session.

Consists of the three sessions:

• 14 July 2026 – AI Methods in VLSI & DV
• 15 July 2026 – Benefits, Limitations & Case Studies
• 16 July 2026 – AI Flows, Deployment & Execution

Register for all 3 sessions of the AI in DV and VLSI training series for only $49

Guest trainer:
Shelly Henry | CEO, Mooreslab AI

This focused three-part series explores how AI is transforming VLSI design and Design Verification (DV) — from code generation to autonomous verification workflows.

Participants will gain a clear understanding of how AI can be applied today, what works in production, and how to safely deploy AI within verification environments.

Session 2 – Benefits, Limitations & Case Studies

• Real benefits: faster coding, improved coverage, reduced debug time

• Risks: hallucinations, IP security, compute costs

• Case studies:

  • Spec-to-UVM generation

  • Automated VLSI coding

• ROI and business case for AI adoption