SoC-Level Full DV & ISO 26262 Evidence | Part 3: Functional Safety Verification

This session will be recorded and will be available to all registrants 1 week post-session.

Consists of the three sessions:

• 14-15 September 2026 1:00 to 5:00 pm – Safety Foundations & Block-Level Verification
• 16-17 September 2026 1:00 to 5:00 pm – CPU/Cluster-Level Safety
• 21-22 September 2026 1:00 to 5:00 pm – SoC-Level Full DV & ISO 26262 Evidence

Register for all 3 sessions of the series for only $150

2-Day Online Training

Format: Live Online
Duration: 2 Consecutive Days | 4 Hours per Day

Learn how functional safety verification scales across full SoCs, including fault management, error escalation, FMEDA evidence generation, and ISO 26262 safety closure methodologies.

This intensive 2-day training explores how SoC-level safety architectures are verified and validated using UVM, fault campaigns, formal verification, and safety evidence workflows.

What You Will Learn

By the end of this training, you will:

• Understand SoC-level safety architectures and fault management

• Explore Safety Management Unit (SMU) verification

• Learn Fault Collection Unit (FCU) and error routing methodologies

• Apply fault campaign and escalation verification workflows

• Generate FMEDA evidence from simulation results

• Understand secure and safe boot verification flows

• Build ISO 26262 safety closure and sign-off strategies

Topics Covered

Day 5 — SoC Safety Architecture & Fault Management

• SoC safety architecture and trust boundaries

• Safety Management Unit (SMU) architectures

• Full DV methodologies for SMUs

• Fault Collection Unit (FCU) verification

• Fault routing and prioritization

• Safe-state controllers and escalation

• Formal verification of escalation properties

• SoC-level safety verification strategies

Day 6 — Fault Campaigns, FMEDA Evidence & Compliance Closure

• SoC-level fault campaigns

• Stuck-at, SEU, clock, and bus fault models

• FMEDA evidence generation

• Diagnostic coverage computation

• End-to-end secure and safe boot verification

• Formal and simulation-based closure

• ISO 26262 sign-off methodologies

• Full-stack safety case workflows

Who Should Attend

• SoC Verification Engineers

• Functional Safety Engineers

• Safety Architects

• ASIC & RTL Engineers

• ISO 26262 Compliance Teams

• Automotive Semiconductor Engineers

Key Benefits

✔ Learn practical SoC-level safety verification methodologies
✔ Understand SMU, FCU, and fault escalation architectures
✔ Explore fault campaigns and FMEDA evidence generation
✔ Apply formal verification and safety closure workflows
✔ Build ISO 26262-compliant verification and sign-off strategies